怎么减少ADC DelSig测量的代码扩展

你好，
在PSoC 5 CY8C5688 AXI-060上，使用Delta Sigma ADC在简单的DCVAD测量上减少代码扩展困难。我的简单测试是通过UART将转换后的代码输出到我的PC来检查结果。直流电压测量产生的代码值与50-200码的价差！
我已经尝试过通过FIR滤波器的结果，以及使用外部电压基准和外部时钟源。我甚至尝试使用旁路去耦合电容在内部电压基准作为数据表说这可能有帮助。当使用FILFILL时，代码扩展略有改善：
ADC配置：MultiSample（Turbo），16位分辨率，1000个SPS，VSSA - 2.048，Bypass Buffer
滤波器配置：1 kSPS，1个滤波级，Blackman，低通，120个抽头，0.1千赫，数据就绪信号中断请求。
@ 1.2 V输入ADC，取1000个样本
无过滤器，内部VREF（1.024）：380000 - 38100
过滤器，内部VREF（1.024）：37980 - 38060
过滤器，内部VREF（1.024），外部时钟（250千赫）：38120 - 38180
滤波器，Ext Vref（1.024），外部时钟（250千赫）38120 - 38165
我的主要问题是我没有基准来比较！ADC代码的扩散实际上有多低，能够进行简单的测量，例如？是否有一个最佳的配置来减少这个？
谢谢你的帮助！



     以下为原文
  Hi,
    Im having difficulty reducing the code spread on a simple DC voltage measurement using the Delta Sigma ADC on the PSOC 5 CY8C5588AXI-060 my simple test is outputting the converted codes via UART to my PC to examine the results. DC Voltage measurements are yielding code values with spreads from 50-200 codes!
    I have tried passing the results through an FIR Filter, as well as using an external voltage reference and external clock source. I have even tried to use a Bypass decoupling capacitor on the internal voltage reference as the data sheet said this may help. The code spread improves slightly when the FIR filter is used:
    ADC Configuration: MultiSample (Turbo), 16 Bit Resolution, 1000 SPS, VSSA - 2.048, Bypass Buffer
    Filter Configuration: 1 ksps, 1 Filter Stage, Blackman, Lowpass, 120 Taps, 0.1 kHz, Data Ready Signal on Interrupt Request.
    @1.2 V input to the ADC taking 1000 Samples
    No Filter, Internal VREF (1.024): 380000 - 38100
    Filter, Internal VREF (1.024): 37980 - 38060
    Filter, Internal VREF (1.024), External Clock (250 kHz): 38120 - 38180
    Filter, Ext Vref (1.024), External Clock (250 kHz) 38120 - 38165
     
    My main issue is that i have no benchmark to compare against! How low is the ADC code spread actually capable of going on a simple measurement such as this? is there an optimal configuration for reducing this?
    Thanks for your help!