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我们有两个板设计验证CyPress,我们使用CGG5分别作为DFP和UFP。我们有外部的CGG5的MUX,可以手动控制使用跳线设置。我们希望在板上建立显示端口(DP)连接。我们使用了SDK附带的笔记本例子。我们只需在CONFIG.H中更改宏配置,就可以区分BW的DFP和UFP板。
在运行和调试代码时,应用程序处理器只能达到“启动”和“连接”2个状态。我们觉得它不能建立一个合适的连接,这就是为什么它正在重试。可能是什么问题,我们如何解决这个问题? 以上来自于百度翻译 以下为原文 We have two board designs verified by cypress where we are using the CCG5 as a DFP and UFP respectively. We have the MUXes external to the CCG5 and can be manually controlled using jumper settings. We want to establish Display Port (DP) connection over the boards. We were using the Notebook example that comes with the SDK. We just change the macro configs in config.h to differentiate bw the DFP and UFP boards. While running and debugging the code the app handler can reach only 2 states "started" and "attach". We feel it is not able to establish a proper connection that is why it is retrying. What might be the problem and how do we approach to solve this problem? |
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***4 发表于 2018-9-30 13:07 你好,丽莎, 1。我们已经使用了CG1的示意性参考。主机端支持USB 3和DP。我们已经验证了我们的核心在另一个开发板没有C型能力。在DFP中,我们使用K7(HPD1)作为控制器的输出并输入到我们的核心。CC线是从C型连接器到核心的输入。UFP板上的连接正好相反。HPD是输入到控制器和从我们的核心输出。如何获取CC谈判日志?我没有CY 4500。 2。如何启用DP汇功能?这有什么宏观关联吗?我感兴趣的唯一宏是“DPYDFPL SUPDP”和“DPUUFPI SUPDP”。我试着让他们单独为两边。 三。我们正在使用DFP侧的C型监视器和UFP侧的C型笔记本进行测试。 请注意,在我们的申请中,我们有单独的董事会作为DFP和UFP。在DFP方面,我们的核心是作为一个主机,而在UFP方面,我们的核心是作为一个设备。 IMAGE 01.JPG 564字节 以上来自于百度翻译 以下为原文 Hello Lisa, 1. We have used the schematic reference for CCG1. The host end has support for USB 3.0 and DP. We have validated that by using our core in another development board without the Type C capabilities. In the DFP we are using the K7 (HPD_1) as an output from the controller and input to our core. The CC lines are an input to the core from the Type C connector. The connection is just the opposite on the UFP board. The HPD is an input to the controller and output from our core. How do I get the CC negotiation logs? I don’t have the CY 4500. 2. How to enable the DP sink function? Is there any macro related to that? The only macro which I found of interest was the “DP_DFP_SUPP” and “DP_UFP_SUPP”. I tried enabling them individually for either sides. 3. We are testing using a Type C monitor on DFP side and a Type C notebook on the UFP side. Please note that in our application we have separate boards as DFP and UFP. On the DFP side our core is acting as a host and on the UFP side our core is acting as a device.
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